In the procesor documentation you find the following:
- chapter 8 - general memory mapping - this gives the offset of the EMAC memory block as
0xFFFC:4000
- chapter 36 - description of the Ethernet MAC subsystem
- item 36.3.2 - memory interface - tells how the memory buffers for RX and TX is set up
- item 36.5 - user interface - table 36-6 gives the names and offsets to all registers used by the subsystem
The signals (=pins) and register offsets you describe are correct.