how does cpu calculate 20-bit address in real mode

Question

i know it uses physical address = segment register << 4 + offset register. Although these two registers are 16-bits, how can 8086 handle a 20-bit plus operation?

Answer 1

The Bus Interface Unit consists of segment registers, adder to generate 20 bit address and instruction prefetch queue. Once this address is sent out of BIU, the instruction and data bytes are fetched from memory and they fill a First In First Out 6 byte queue.

See a document called "8086_Internal_Block_diagram_enotes.pdf", easily to be found via Google. Also see this document, the section about the Bus Interface Unit.

So the processor generates these 20-bit addresses "on demand" with a dedicated internal 20-bit register, if you will.

Answer 2

When you shift a 16 bit number 4 places to the left, you're essentially creating a 20 bit number. The offset then indicates how far into that range you will go. See the Wikipedia article on Real mode addressing.

Example:

0x0001  << 4  ->  0x00010  (5 sets of 4 bits in each hex digit -> 20 bits)