At power-up, in effect the MMU will be disabled. That much is generic.
To access NOR flash, there would be a default mapping for (at least) some of the address space. First instruction would be typically fetched from 0xFFFF0000 (ARM) or 0xFFFFFFFC (Power PC) and vicinity. But there are pinstrap options that can affect this. Booting a processor is not really generic.
There are plenty of other options (NAND flash, SPI ROM, MMC) for storing boot code. For general concepts, Hallinan includes a chapter on booting. For details you'd have to look at the technical manual of a specific CPU, e.g. OMAP4 TRM is an example for ARM, then find sections describing boot process.