Question

I'm having a problem with modelsim and I'm not even sure that a solution exists.

For one of my projects, I have to drive (and spy) some testbench signals with text files as input. I want to use *init_signal_drive* and *init_signal_spy* procedure to keep signal names (in text files) as string.

The problem is : if the name in the text file doesn't fit the actual name of the signal in the testbench, functions *init_signal_xxx* will fail without lots of information.

What I want to do is to test the existance of the signal from its "string" name before calling the *init_signal_xxx* procedure.

Does anyone know if it's possible and how to do it ?

A second solution for my problem would be to catch the state of the *init_signal_xxx* procedure (passed or failed), but I'm not sure it's possible anyway.

Thanks a lot

Was it helpful?

Solution

If you wanted, you could make a record with strings to 'wrap' around your actual signal. This is a little kludgey, but it is hard for me to think of another way, short of head-hurting magic with files that would be even worse in VHDL. So:

type stdWithName is
     record
         name : String;
         value : std_logic;
end record;

you could then initialize this like:

signal val : std_logic := '0';
signal withName : stdWithName := ("withName",val);

and compare the name like

if (withName.name = "withName") then
      -- huzzah! a match. 
end if;
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