There is a syntax error with quotes around dig0
and dig1
signal identifiers, so try to change case "dig0" is
to case dig0 is
, and case "dig1" is
to case dig1 is
.
But anyway, the Xilinx parser is not robust enough since it crashes, so it is a good habit to create a WebCase for issues like this, so Xilinx can improve in the future.